[ibis-macro] FW: PCIe Gen3 jitter in AMI

  • From: "Muranyi, Arpad" <Arpad_Muranyi@xxxxxxxxxx>
  • To: "IBIS-ATM" <ibis-macro@xxxxxxxxxxxxx>
  • Date: Fri, 17 Sep 2010 07:48:54 -0700

Hello IBIS-AMI experts,
 
I just received this email from Kumaran.  Please read it
over and let me know how you feel about it.  It seems
that he is making a valid request, and I know we will
talk about jitter soon...
 
Thanks,
 
Arpad
=========================================================

________________________________

From: Kumaran Krishnasamy [mailto:kumaran@xxxxxxxxxxxx] 
Sent: Thursday, September 16, 2010 6:28 PM
To: Muranyi, Arpad
Subject: PCIe Gen3 jitter in AMI



Hi Arpad,

 

I understand from the latest version of your spec that some components
of Tx/Rx jitter are allowed as AMI parameters. 

 

I'm mainly involved in using PCIe AMI models for channel modeling. As
you may have already known, the latest PCIe Gen3 spec has some other
jitter components that are not currently addressed in AMI. I also
understand the recommendation is to use the EDA tool to include these
additional jitter components during channel simulations. 

 

However, since this PCIe standard is very widely used, I'm wondering
whether you'll be considering incorporating these additional jitter
components (such as uncorrelated jitter, F/2 jitter, pulse width jitter
etc) also in the future AMI specs, moving forward. To my knowledge, if
the PCIe jitter components can be covered somehow, then pretty much it
will cover almost all the other standards J 

 

If you like to know more about this new jitter breakdown in PCIe Gen3
spec, please let me know, I can send the relevant sections of the spec.

 

Also PCI-SIG electrical working group (EWG) has posted a channel sim
tool called Seasim (including the source code written in Python) where
they inject all these worst case jitter components, to meet the worst
case specs. The drawback of this tool is that we can't bring our own
Tx/Rx models, as we can do with AMI channel simulations. That's why I'd
very much like to know whether there will be any provision for this in
AMI spec, in the future.

 

I'm sure there must be other participants in your work group who are
also members of PCI-SIG. You can probably discuss with them too about
what I'm thinking or requesting from your committee.

 

Please let me know your thoughts on this. 

 

Thanks.

 

Regards,

Kumaran

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  • » [ibis-macro] FW: PCIe Gen3 jitter in AMI - Muranyi, Arpad