All,
I have submitted the enclosed presentation on Fixing [Pin Mapping] for the
IBIS Summit at DesignCon.
We have been discussing issues such as can a "GND" supply be used as a
Pulldown Ref on one buffer and a Pullup Ref on another buffer. There is no
such rule in IBIS, but IBIS Check seems to have some problems here. The
intent of this presentation is not to address this issue, but the more
fundamental issue of what rules should be applied to [Pin Mapping] bus
labels not are not stated in IBIS, nor checked in the IBIS Parser.
There are two rules that are "Self-Evident" but not explicitly stated in
IBIS. The first is that [Pin Mapping] should not short two different
supply voltages, and the second is that bus labels should not short POWER
and GND.
This presentation does several things:
1. Describes the significance of IBIS declaring that a Pin
signal_name is the data book name for the signal on that pin.
2. Shows by a simple example how bus_labels in [Pin Mapping] works
3. Shows how bus_labels can be used to short different signals
together, and how bus_labels can short POWER and GND
4. Defines two rules that are "Self-Evident", that should be checked
and reported as errors in the IBIS Parser if violated.
5. Eliminate huge potential confusion by allowing signal_names to be
bus_labels by default
The two new rules are:
1. All pins with the same signal_name must have the same model_name
2. All POWER and GND pins with the same bus_label must have the same
signal_name
With these rules, every bus_label on a I/O buffer pulldown_ref,
pullup_ref, gnd_clamp_ref, power_clamp_ref or ext_ref is either a POWER or
GND. IBIS currently has not rules as to whether any of these must be a
POWER or GND. I do not think there should be any such rule, and IBIS
Check should not generate an error if a POWER bus_label is used on a
gnd_clamp_ref or pulldown_ref, or if a GND bus_label is used on a
power_clamp_ref or pullup_ref (although one could generate an
informational comment when this occurs).
As a practical matter, every IBIS file that has a [Pin Mapping] section
defines bus_lables that are signal_names. So I do not believe there are
any IBIS files in existence that will generate errors for rule 2 above. I
expect there maybe IBIS files that do not have [Pin Mapping] that have
some two pins with the same signal_name with one having model_name POWER
and the second model_name GND. We could apply rule 1 retroactively to all
IBIS Files, limit it to IBIS files that have [Pin Mapping], or limit the
rule to IBIS files that have [Pin Mapping] and IBIS Version > 6.1.
Finally, although I have suggested a new [Pin Mapping] keyword that
automatically makes signal_names bus_labels, I think that the only IBIS
file that would become broken is given by the following example:
[Pin] signal_name model_name | Data Book Information
1 DM1 DM | Rails are VDD and VSS
11 VDD POWER | DC Power Supply 1.2V 1.14-1.26V
12 VSS GND | Ground
[Pin Mapping] pulldown_ref pullup_ref gnd_clamp_ref power_clamp_ref
ext_ref
1 VDD VSS
11 NC VSS
12 VDD NC
This IBIS file (base_power_aware_swizzle.ibs enclosed) passes the IBIS
Parser today.
Walter
Walter Katz
<mailto:wkatz@xxxxxxxxxx> wkatz@xxxxxxxxxx
Phone 303.449-2308
Mobile 303.335-6156
Attachment:
Fixing_Pin_Mapping.pptx
Description: MS-Powerpoint 2007 presentation
Attachment:
power_aware_swizzle.ibs
Description: Binary data
