[ibis-macro] IBIS-AMI Check List -- for Discussion
- From: Gregory R Edlund <gedlund@xxxxxxxxxx>
- To: ibis-macro@xxxxxxxxxxxxx
- Date: Fri, 15 Mar 2013 11:29:51 -0500
Dear IBIS Folks,
This is the check list we're using with our internal supply chain people to
help coordinate models from our suppliers. I'm sharing this as a starting
point for discussion about a similar list that the committee might consider
publishing someday. Think of this as the AMI addendum to the current IBIS
Quality Checklist.
Greg
Version 1.0
03/15/13
Greg Edlund
gedlund@xxxxxxxxxx
COMPLETENESS
1.1 All files distributed in a single archive
1.2 IBIS files pass syntax checker
1.3 Touchstone package model(s) present
1.4 Analog buffer model present
a. ibs file includes IV curves, VT curves, and C_Comp
b. package s-parameter file
1.5 RX equalizer training algorithm included in DLL
DOCUMENTATION
2.1 List of companies and technical support contacts:
a. chip developer
b. serdes circuit designer
c. model developer
d. silicon manufacturer
2.2 Software and version used to develop model
2.3 Simulator(s) and version used to test model
2.4 Instructions for use (PDF application note):
a. type of TX equalization and number of taps
b. type of RX equalization and number of taps
c. look-up table of equalizer settings vs. register settings
d. look-up table of amplitude settings vs. register settings
e. s-parameter port map
FUNCTIONALITY
3.1 Test TX & RX DLLs “IBIS-AMI Evaluation Toolkit”
http://www.eda.org/ibis/macromodel_wip/tools/
3.2 Test model with various simulators through IBIS Open Forum review
services
3.3 Test model on computer without development environment installed
3.4 Model installation directory independent of execution directory
3.5 Unrecognized parameters do not cause failure
3.6 Model returns correct results at any samples-per-bit setting
3.7 Able to manually override equalizer settings
3.8 Able to view equalizer tap coefficients after TX and RX training
3.9 Multiple instances of one model run in one simulation/analysis,
e.g. crosstalk
3.10 Multiple instances of multiple models run in one simulation/analysis,
e.g. crosstalk with chips from two or more suppliers
3.11 Support multiple concurrent simulations/analyses (parallel processing)
3.12 No external software required to run simulations,
e.g. gargantuan run time libraries called by DLL
ACCURACY
4.1 Features that affect S11 included in analog model, not algorithmic
model
4.2 No double counting of package, e.g. s-parameters and .ibs file
4.3 No double counting of C_Comp, e.g. s-parameters and .ibs file
4.4 S-parameters for test channel distributed with model
4.5 Expected jitter and eye dimensions for test channel
4.6 PHY supports on-chip oscilloscope GUI running on PC
4.7 PHY outputs test pattern with oscilloscope connected (PRBS length = ?)
4.8 Lab report to include:
a. TX jitter decomposition measurements
b. RX stressed eye testing
c. Model-to-hardware correlation
b. Proof of industry standard compliance
4.9 Demo board to include 2.92 mm connection to TX with 2 in. max wire
Contributions from SiSoft, "Opal(TM): Best Practices for IBIS-AMI
Modeling"
Greg Edlund
Senior Engineer
Signal Integrity and System Timing
IBM Systems & Technology Group
3605 Hwy. 52 N Bldg 050-3
Rochester, MN 55901
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