[ibis-macro] IBIS-ATM teleconference - Agenda for 12/9/2008
- From: "Muranyi, Arpad" <Arpad_Muranyi@xxxxxxxxxx>
- To: "IBIS-ATM" <ibis-macro@xxxxxxxxxxxxx>
- Date: Tue, 9 Dec 2008 08:22:49 -0800
Time: December 9, 2008 Noon PDST
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Agenda
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1) Opens
2) Call for any related patent disclosures
3) Review of ARs:
To All: People should bring their lists of things that need to
be solved in an overhauled new IBIS specification
Michael M.: - Send proposal document to Mike LaBonte for posting;
- Confirm with Synopsys whether "used by permission"
can be used as the official indicator on relevant
documents.
- in progress
Old ARs:
- Arpad: Write parameter passing syntax proposal (BIRD draft)
for *-AMS models in IBIS that is consistent with the
parameter passing syntax of the AMI models
- not done
- TBD: Propose a parameter passing syntax for the SPICE
[External ...] also?
- Arpad: Review the documentation (annotation) in the macro libraries.
- deferred until a demand arises or we have nothing else to do
4) Synopsys update (Todd/Mike)
5) Continue our brain storming session on what the overhauled IBIS
specification would look like. A few thoughts from last week's
meeting (based on the minutes):
- look at a higher level for what is needed before going into
technical details; clarify assumptions of things we like about
existing IBIS and what we need a new IBIS for
1) need to model buffers separately from packages and system
level models that need netlists
2) table based or equation based, or both?
3) at a low level: not enough controllability (e.g. coefficients
for equalization. Data is too hard to extract)
4) at a high level: three major assumptions in current spec that
aren't appropriate anymore:
- typ/min/max concept, with three corner format
- post layout is not as strong an interest to many people
- IBIS is not setup well for pre-layout simulation
5) differential buffers are inconvenient to correlating to SPICE
6) multiple power supply buffers are difficult
7) new IBIS could embrace existing IBIS applications but expand
to include others
8) must be able to do batch simulations
- three issues need to be addressed:
1) assigning models to the system,
2) how do you simulate them
3) how to interpret the simulation results
- solution must be truly universal, work close to the same in
multiple tools
- language related questions:
1) invent a new language vs. turn to existing languages and
perhaps modify them?
- potential existing languages: IBIS, *-AMS, SPICE
- VHDL-AMS difficult because it is strongly typed
- Verilog-A(MS) more user friendly, but less mature
- SPICE somewhat limited in behavioral capabilities
- Matlab, Mathcad, C, C++, Visual Basic, etc...?
- is there a familiarity problem with acceptance?
- how is a transistor model turned into a behavioral
equation model (whatever language is used for it)?
2) should we pick any of these and "build on it" our own
language?
- this would be a huge effort
- EDA vendors would most likely have to build a new engine
- reusing an existing language may be easier to implement
and get models for it (the usual chicken and egg problem)
- does any of the existing languages contain everything we
need? (eye masks, pin lists, T-line, S-parameter, etc...)
- and much much more...
Thanks,
Arpad
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