David,
Thanks for your question/comment. I used both methods to plot the waveforms.
Read the legend carefully to find out how the corresponding waveform is plotted.
When the legend says V(Nd1p) or similar, than the waveform is plotted with
respect
to global ground (node 0), i.e. the waveform is a (single ended) “node
waveform”.
When the legend says V(Nd1p,Nd1n) then the waveform is a “port waveform”. I
agree that “node waveforms” are not very meaningful in this context, but I
wanted
to show them, especially for the “-“ terminals of the ports, so that we can see
how
things are referenced… But this is the very reason why I added on the last few
slides
the “port waveforms” on the bottom.
I hope this answers your question. Please look them over again and let me know
if
you have more questions/comments.
Thanks,
Arpad
===================================================================
From: David Banas [mailto:capn.freako@xxxxxxxxx]
Sent: Tuesday, February 27, 2018 4:48 PM
To: Muranyi, Arpad <Arpad_Muranyi@xxxxxxxxxx>
Cc: ibis-macro@xxxxxxxxxxxxx
Subject: Re: [ibis-macro] Re: IBIS-ATM teleconference - Agenda for February 27,
2018
Hi Arpad,
Thanks for the presentation, today!
I have a question: those plots you showed us, particularly those showing
strange signal aberrations when you applied an AC voltage component to the node
you connected to the reference terminal of your S-elements, were they
single-ended plots?
That is, did you ask your plotting routine to show you the voltage at node X,
as opposed to asking it to show you the difference between node X and node Y?
If so, I don’t think they were meaningful, because you had changed the
reference for that portion of your circuit, by connecting the reference
terminal of your S-elements to something other than the “0” net. Then returning
to using the “0” net as your reference for plotting, which is what the tool
does when you ask for a single-ended plot, wouldn’t make sense physically.
-db
On Feb 27, 2018, at 1:26 PM, Muranyi, Arpad
<Arpad_Muranyi@xxxxxxxxxx<mailto:Arpad_Muranyi@xxxxxxxxxx>> wrote:
All,
Here are the slides we discussed in the ATM meeting today.
Mike L.: Could you please post them to the ATM website archives?
Thanks,
Arpad
=====================================================
From: Muranyi, Arpad
Sent: Tuesday, February 27, 2018 11:51 AM
To: ibis-macro@xxxxxxxxxxxxx<mailto:ibis-macro@xxxxxxxxxxxxx>
Subject: IBIS-ATM teleconference - Agenda for February 27, 2018
Time: Tuesday, February 27, 2018 at Noon US Pacific Time
=====
WebEx:
======
https://sisoft.webex.com/sisoft/j.php?MTID=m1775c35b7d9a55735fbb2c67876222ba
Meeting Number: 735 161 627
Meeting Password: IBIS
Audio:
======
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Access Code: 685-0440
Mentor Global Crossing Teleconference commands for audio:
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---------------------------------------------------------------------
---------------------------------------------------------------------
Agenda
======
1) Opens
2) Roll call
3) Review of ARs:
Any other AR-s?
4) Call for any IBIS related patent disclosures
5) Approval of minutes
6) S-parameter referencing in BIRD158 and BIRD189 (All)
- discussion
7) Motion to adjourn?
Topic bin list:
===============
- FEC handling (Mike L. already suggested this)
- Complex C_comp resolution (Randy’s suggestion)
- Allowing Terminator as a model_type for IBIS-AMI receivers
(this keeps getting dropped)
- Updating the input thresholds/measurement target information in
IBIS to include an eye diagram specification in the IBIS file
(including BER)
- Removing the single-ended input threshold requirements for
differential buffers
- Removing the single-ended characterization load requirements for
differential buffers
- Guidance for power-aware vs. AMI models – do we have rules for
how a power-aware (and therefore potentially non-LTI) buffer
analog data set should be used with IBIS-AMI algorithmic data?
- Fix all the referencing problems in the current specification
(after Randy’s C_comp proposal and BIRD189 are done)
Tabled topics:
==============
8) Buffer impedance / C_comp improvements (Randy)
- discussion
9) Single ended applications of algorithmic modeling (All)
- do we need to make any changes in the spec?
- we need Fangyi's presence to discuss his concerns
- discussion
a) single ended filter needs different algorithms
- EQ effecting Vref
b) rise/fall may be asymmetric
- gets worse at higher data rate
c) loss of information when using difference signals only
d) power aware simulation (SSO effects)
10) New BIRDs from Editorial Task Group? (Bob/Radek)
a. Specify buffer reference terminals for pins ([Pin Reference])
b. Simulation (aka DIA) vs. DUT (depends on #a)
c. C_comp and package reference in simulation clarifications
(depends on #a)
d. Make changes to the [Receiver Threshold], once a. and b. are resolved
11) 166.4 Resolving problems with Redriver Init Flow (Walter)
12) BIRD190 (Ambrish)
13) Fangyi’s Redriver flow BIRD draft (Fangyi)
- add equations
- consider rewriting the AMI "front end" in the spec (flows)
(when this proposal is added to the spec)
14) How to handle missing min/max data? (Arpad)
- what should be the governing rule for synchronizing
typ/min/max data?
Pending BIRDs, expected to be rejected:
=======================================
125.1 Make IBIS-ISS Available for IBIS Package Modeling
145.3 Cascading IBIS I/O buffers with [External Circuit]s using the [Model
Call] keyword
163 Instantiating and Connecting [External Circuit] Package Models with
[Circuit Call]
164 Allowing Package Models to be defined in [External Circuit]
Pending BIRDs, expected to be accepted (currently in discussion):
=================================================================
189.5 Interconnect Modeling Using IBIS-ISS and Touchstone
Pending BIRDs awaiting discussion:
==================================
166.4 Resolving problems with Redriver Init Flow
181.1 I/V Table Clarifications
190 Clarification for Redriver Flow
TBD New proposal for Redriver Flow (may replace BIRD166)
TBD C_comp modeling with IBIS-ISS
Thanks,
Arpad
=====================================================================
<ReferencingProblems_2018_02_27.pdf>