[ibis-macro] Minutes from the 14 nov 2006 ibis-atm meeting
- From: "Doug White \(dowhite\)" <dowhite@xxxxxxxxx>
- To: <ibis-macro@xxxxxxxxxxxxx>
- Date: Fri, 17 Nov 2006 13:40:55 -0500
Attached.
Doug White
Tech Lead, Signal Integrity
Service Provider/Routing Technology Group
Cisco Systems, Inc.
(919) 392-4103
IBIS Macromodel Task Group
Meeting date: 14 nov 2006
Members (asterisk for those attending):
Arpad Muranyi, Intel Corp.
* Barry Katz, SiSoft
Bob Ross, Teraspeed Consulting Group
* Doug White, Cisco Systems
* Hemant Shah, Cadence Design Systems
* Ian Dodd, Mentor Graphics
* Joe Abler, IBM
John Angulo
John Shields, Mentor Graphics
Ken Willis, Cadence Design Systems
* Kumar, Cadence Design Systems
* Lance Wang, Cadence Design Systems
* Michael Mirmak, Intel Corp.
* Mike LaBonte, Cisco Systems
Paul Fernando, NCSU
* Randy Wolff, Micron Technology
Richard Ward, Texas Instruments
Sanjeev Gupta, Agilent
Shangli Wu, Cadence
* Todd Westerhoff, Cisco Systems
* Walter Katz, SiSoft
Vuk Borich, Agilent
Vikas Gupta, Xilinx
-------------
Review of ARs:
- Mirmak: Who has permission to access VHDL spec?
Has anyone tried?
- Mike update macro library documentation
not yet
-------------
New Discussion:
Does the MeetMe phone bridge service have a mute command?
- self mute: *6
We pretty much got to the end of Kumar's presentation last time. Nothing new to
present today.
Comments on Kumar's proposal:
- Ian: Mentor using pole-zero format for characterization (more accurate).
Concerned because Kumar is using pulse or impulse response.
- Joe: Necessary to specify the format in the model.
- Mirmak: The more specific we make any change, the more IBIS "overhead" we go
through.
- Kumar: you can't reproduce the impulse from pole/zero.
Ian: Impulse is truncated in time.
Kumar: Pole/zero is a rational approximation.
- Kumar can modify in 2 places:
1) Can modify impulse response
2) Can modify wave coming through channel
AR: Ian get specifics on pole/zero approach...can it be used in conjunction
with the API approach being proposed?
Mirmak: If API assumes some methodology, how do we avoid issues:
- Simple method may be insufficient for "the next thing".
- Advance features favor EDA vendors who have it already, take a long time.
Ian: Kumar has given a good starting point.
Walter: Hope to have something by DesignCon.
Mirmak: We need someone to volunteer to write a BIRD.
AR: Cadence will start a BIRD. Ian ok with Cadence making an initial proposal,
then we address objections.
Recent macromodel issues on email reflector:
Walter: Revolves around how to pass parameters to SPICE
Mirmak: IBIS calls for Berkeley SPICE
Walter: EDA tools can preprocess to convert to their own SPICE
- SiSoft, Cadence, and Mentor do not object
Mirmak: IC vendors want to ship just one model that works in all tools.
Walter: how many 4.2 files out there have external circuits
Ian: Mentor has ones written for ELDO
There appear to be no Berkeley SPICE [External Circuit] models
Walter: defacto standard is really HSPICE
Mirmak: gives control to Synopsys
Todd: get Synopsys to put HSPICE language in public domain
- Not as insane as it sounds.
- Arpad and Todd started to pursue, but then we switched focus to *AMS
Lance: no simulator can simulate VHDL and Verilog together???
- Ian disagrees
Todd: Cadence prefers Verilog, Mentor prefers VHDL, others can't do both at all.
- AMS people hated macro because it's not pure *AMS, others hated it because it
is *AMS
- We built macro library
- A preemphasis driver was built with this library of building blocks, and
that's really about it
- Do we think that semiconductor vendors will be willing to recode their models
in AMS???
- Then we looked for template circuits, and found 2
- There have been VERY few models created for VHDL- or Verilog-AMS
- Now we want executables
Mirmak: Mentor has proposed standardized encryption
Kumar: primary concern is identifying data flow, and building simplest
possible interface, with good performance
AR: Todd dig up material on public domain HSPICE syntax
Walter: nice to pass parameters for corners, but Berkeley SPICE can't do that
Mirmak: would rather use subset of "defacto" SPICE
Should there be a field that specifies which simulator an [External Circuit] is
targeted for
- Could be in comments, an existing practice.
Mirmak: General knowledge of behavioral modeling is low. We shouldn't encourage
SPICE.
Todd: make it painless to run SPICE, and people will be better off.
Ian: Customers want multiple languages supported.
Next week meeting cancelled, next meeting will be Nov 28.
-------------
Next meeting: Tuesday 28 Nov 2006 12:00pm PT
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