[ibis-macro] Minutes from the 8 Jan 2013 ibis-atm meeting

  • From: Mike LaBonte <mike@xxxxxxxxxxx>
  • To: IBIS-ATM <ibis-macro@xxxxxxxxxxxxx>
  • Date: Tue, 8 Jan 2013 16:57:12 -0500

Minutes from the 8 Jan 2013 ibis-atm meeting are attached.

Mike
IBIS Macromodel Task Group

Meeting date: 08 Jan 2013

Members (asterisk for those attending):
Agilent:                    * Fangyi Rao
                            * Radek Biernacki
Altera:                     * David Banas
                              Julia Liu
                              Hazlina Ramly
Andrew Joy Consulting:        Andy Joy
ANSYS:                        Samuel Mertens
                            * Dan Dvorscak
                            * Curtis Clark
                              Steve Pytel
                            * Luis Armenta
Arrow Electronics:            Ian Dodd
Cadence Design Systems:       Terry Jernberg
                              Ambrish Varma
                              Feras Al-Hawari
                              Brad Brim
                              Kumar Keshavan
                              Ken Willis
Cavium Networks:              Johann Nittmann
Celsionix:                    Kellee Crisafulli
Cisco Systems:                Ashwin Vasudevan
                              Syed Huq
Ericsson:                     Anders Ekholm
IBM:                          Greg Edlund
Intel:                      * Michael Mirmak
Maxim Integrated Products:    Mahbubul Bari
                              Hassan Raghat
                              Ron Olisar
Mentor Graphics:            * John Angulo
                              Zhen Mu
                            * Arpad Muranyi
                              Vladimir Dmitriev-Zdorov
Micron Technology:            Randy Wolff
                              Justin Butterfield
NetLogic Microsystems:        Ryan Couts
Nokia-Siemens Networks:       Eckhard Lenski
QLogic Corp.                  James Zhou
SiSoft:                     * Walter Katz
                              Todd Westerhoff
                              Doug Burns
                            * Mike LaBonte
Snowbush IP:                  Marcus Van Ierssel
ST Micro:                     Syed Sadeghi
Teraspeed Consulting Group:   Scott McMorrow
                            * Bob Ross
TI:                           Casey Morrison
                              Alfred Chong
Vitesse Semiconductor:        Eric Sweetman
Xilinx:                       Mustansir Fanaswalla
                              Ray Anderson

The meeting was led by Arpad Muranyi

------------------------------------------------------------------------
Opens:

- Arpad: We will not meet Jan 29 since most of us will be at DesignCon

- Radek: Would like to discuss the latest dependency table BIRD

--------------------------
Call for patent disclosure:

- None

-------------
Review of ARs:

- Fangyi, Ambrish, Walter to discuss merging their "Redriver" proposal with 
BIRD 131.
  - Fangyi: There has been no progress
    - Walter believes one BIRD is generic while the other is AMI specific
    - This makes it too difficult to merge them
  - Arpad: Should we cancel this AR?
  - Walter: Yes, we can cancel

-------------
New Discussion:

Interconnect task group report:
- Michael M: There has been no meeting since the last report
  - We will continue discussion of tying AMI analog with interconnect proposals
  - The next meeting will be tomorrow
- Walter: I sent a presentation in Dec reviewing that topic
  - It was an email sent Dec 18

Arpad showed a presentation Analog Modeling Discussion:
- slide 2:
  - Arpad: Our discussions have been going in circles
    - We have too many BIRDs
    - Some conceptual questions must be answered
- slide 3:
  - Arpad described classic IBIS I/V behavior with regard to voltage
  - Arpad: It handles only two "on" states
  - Walter: Our fundamental differences are on three points shown here
    - Everything here is true for [External Model] in IBIS 4.1 on, but not for 
anything else
- slide 4:
  - Arpad: Current flows from either of two supply nodes
    - There is no direct transfer function from logic input to output
    - The input stimulus is really a selector
    - High and low states can have different impedance
- slide 5:
  - Arpad: [Driver Schedule] describes events, the EDA tool handles the 
transition
- slide 7:
  - Arpad: LTI models such as s-params almost could be used directly
    - But the spec says the impulse response has to be convolved
- slide 8:
  - Arpad: This is the regular flow
- slide 9:
  - Arpad: The alternate flow has the combined channel between the GetWaves
  - Walter described the process differences
- slide 10:
  - Arpad: The TX GetWave input stimulus is ideal, except maybe adjusted for 
V=0 timing
    - The output is semi-digital
  - Walter: In this case only because the FFE is ideal
- slide 11:
  - Arpad: For this flow the TX GetWave input has to be analog (semi-digital)
    - The RX output is 1, 0, or X
    - None of this is stated in IBIS 5.1
  - Walter: There are many issues with this
- slide 12:
  - Arpad: BIRD 116 proposes something similar, except a D-to-A is added
- slide 14:
  - Arpad: These possible changes to [Model] may be too complicated
- slide 15:
  - Arpad: Do we really need supply terminals?
- slide 16:
  - Arpad: [Algorithmic Model] is always differential, but [Model] is single 
ended
    - It could not be used for single ended simulations
- slide 17:
  - Arpad: There are many issue using [Model] for AMI
    - We need a new model keyword for AMI

slide 4:
  - Walter: We should focus on only Pullup and PullDown curves
    - AMI assumes they are linear
    - Also we can only measure in high and low states
    - But the K(t) functions simulate intermediate states
    - With SerDes the devices really just change current flows
    - A SerDes can have many states, not just two
    - It can be represented with Pullup and PullDown coefficients
    - The Pullup/PullDown impedance doesn't matter because they are used 
differentially
    - The total impedance remains the same
    - The control logic was implemented the way push-pull drivers typically 
worked
    - But nothing in IBIS forces it to be that way
    - This is why using the IBIS buffer for the analog model is a problem
  - Radek: That ignores some items in the IBIS spec
    - An s-param block can't have DC sources
    - I agree with Arpad
  - Walter: The TX and RX models, especially above 6GHz, are s4p models
    - We can do a better job describing how to generate those

  - Arpad: What is used for the control input
  - Walter: Effectively the GetWave output
  - Radek: IBIS did not specify this well enough
  - David: It was described in terms of mathematics
    - We are changing the value of PUref and PDref
    - The FIR output gives these values
  - Michael M: Would like to hear how others are interpreting the spec
    - It doesn't have to be digital vs. analog, it can be seen as real numbers
  - David: It is the reference that changes, with UI granularity
  - Michael M: We may need new model keywords to handle this right
  - David: This also means clock-to-out for IBIS models is meaningless
  - Walter: Timing is always done with standard loads
    - IBIS says nothing about clock-to-out
    - Values change in UI increments only with a "nice" FFE
    - I have been modifying the Ramp boxes, not the PU reference
  - Arpad: That relates to the idea that these are just real numbers
- slide 12:
  - Arpad: The TX analog model input supplies power, so PU reference does not
  - Walter: The diagram here doesn't quite work because it doesn't show
    correct s-param connection to the differential driver

Michael M: We need a BIRD to address this
- Arpad: First we must settle our differences, whether a new keyword is needed
- David: We probably need to discuss the flows again to test assumptions
- Michael M: We need to see if people adhere to flow understanding A, B, or 
even C
  - A majority vote would not work well
- Arpad: We might need to settle Walter's assertion about pre-4.0 IBIS
- David: That may be going too far back
- Walter: We just need to be able to describe the analog model as s4p
- Arpad: Where is it connected?
- Walter: To the output of the logic block
- Arpad: We still need to determine the logic voltage level
- Walter: A document will be presented on that
- David: Each EDA vendor should present on how they handle TX GetWave
- Fangyi: We would have to get internal approval for that

-------------
Next meeting: 15 Jan 2013 12:00pm PT

Next agenda:
1) Task list item discussions

-------------
IBIS Interconnect SPICE Wish List:

1) Simulator directives

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