Walter, Since you are quoting me, I feel I need to respond, although it seems that you are soliciting a response from others too. Let's go through some facts. In the case of a [Model] (without [External Model]), we have a collection of I-V curves, [Ramp] and optionally V-t tables and a few more items. There is nothing in a [Model] that serve as a voltage source in the sense of a circuit element. The [Voltage Range] and related keywords give the information to the EDA tool or the user about the supply voltage that the [Model] data was extracted, so that they would know how to power it up. The IBIS specification doesn't say how the power should be connected to the [Model] or who is responsible to do so. The EDA vendor can choose to make it easy for their user by providing an automated way, or let the user put it on their schematics manually (like the HSPICE B-element does it). The package modeling keywords existed in IBIS way before the days of [External ***], and the capability was there for the user to run power integrity simulations (as far as the IBIS specification was concerned). Not all tools implemented this capability the same way, but if you were an HSPICE user, you could put all kinds of parasitics around the B-element and enjoy watching the bouncing power and GND nodes. In my Intel days, I worked with the HSPICE guys pretty closely and they implemented the I-V curve scaling feature on my request, which later became BIRD 95/98 and the ISSO keywords. This feature allows the user to generate more realistic simulation results because the actual (bouncing) supply's deviation from the IBIS (nominal) supply value is used as a scaling coefficient on the I-V curves. Of course if the user turns on the internal supply voltage option of the B-element, all this power integrity capability is gone, and if they are not careful in their netlist, they can occasionally get inductor / voltage supply loop errors... The point I am trying to make here is that this was all happening before [External ***] existed or was used for anything in this context, and that the question you are raising about where the supply source is added to the simulation is really a decision the user or the EDA tool vendor has to make. I don't see anything different in this picture when there is an [External Model] in the [Model]. The only difference in this case is that we don't have control over what a model maker puts into an [External Model] and therefore it can be written so that it includes an ideal DC source to power itself. In this case the model's author should have enough brains to either not connect these sources to the power terminals of their model, or provide a switch to turn them on or off (i.e. to disconnect them from the power terminals of [Model]), because multiple such models are connected together, they will most likely generate an inductor/voltage source loop error. The model maker should also make it clear to the user that this type of model is not suitable for power integrity simulations, since it has its own DC power supply built in. But note that while it is possible, it would be quite weird for the model maker or user to rely on one such a [Model] to power another (unpowered) [Model]. Going back to your questions, I don't think that there was any intent or requirement in the IBIS specification for the model to supply itself. What the B-element does is a nice feature, but it is a shorthand feature for the user's benefit, and not something that the IBIS specification requires or controls. Regarding: "Does this mean that the subckt generate A_puref, or the EDA tool must supply a DC voltage source with value [Voltage Range] ([Pullup Reference]). In a power aware simulation in only makes sense that the EDA Tool supply a signal to A_puref with a value ~[Voltage Range]." No, the subcircuit should not generate a voltage. When did you see a buffer on silicon that acts as a power plant? :) The supply related keywords provide the information to the user or tool so that they know what the nominal value is for the supply. And even if the power delivery network contains a bunch of losses and bounces, there is somewhere at the end of the chain some source that will need these values, right? Regarding: "This implies that the EDA tool supplies the Pullup Voltage in the range of typ min max. But of course this says than a Max (Fast) simulation cannot supply more than max, and a Min simulation cannot supply less than min, but this make no sense if there is fluctuations of the reference voltage." No, it doesn't mean that. The meaning is that the I-V and V-t data was extracted at these values, and if your tool's [Model] algorithm is smart enough to account for the scaling of the I-V curves due to voltage variations, the user or simulator can apply any voltage to the [Model] and still get more or less accurate results by modulating the [Model]'s drive strength based on the actual voltage at its terminals. BIRD 95/98 was added to the IBIS specification to help in doing this based on data in the .ibs file instead of guesses. Regarding: "So we clearly cannot use [External Model] to do power simulations since the PuRef must be fixed." None of the supply references must be fixed. There is nothing in the IBIS specification that says so, as far as I can tell. OK, now we can start arguing over what those red highlighted words mean in the spec. What I am telling you above is the intent I remember when we were working on the earlier versions of the specification. Thanks, Arpad ==================================================================== From: ibis-macro-bounce@xxxxxxxxxxxxx [mailto:ibis-macro-bounce@xxxxxxxxxxxxx] On Behalf Of Walter Katz Sent: Saturday, April 27, 2013 1:23 PM To: IBIS-ATM Subject: [ibis-macro] [Model] and [external Model] Voltage Levels All, IBIS 5.1 says (p 95): The rules for pad connections with [External Model] are identical to those for [Model]. The [Pin Mapping] keyword may be used with [External Model]s but is not required. If used, the [External Model] specific voltage supply ports-A_puref, A_pdref, A_gcref, A_pcref, and A_extref-are connected as defined under the [Pin Mapping] keyword. In all cases, the voltage levels connected on the reserved supply ports are defined by the [Power Clamp Reference], [GND Clamp Reference], [Pullup Reference], [Pulldown Reference], and/or [Voltage Range] keywords, as in the case of [Model]. Does this mean that the subckt generate A_puref, or the EDA tool must supply a DC voltage source with value [Voltage Range] ([Pullup Reference]). In a power aware simulation in only makes sense that the EDA Tool supply a signal to A_puref with a value ~[Voltage Range]. Arpad claims that the [External Model] subckt can either consume A_puref or generate A_puref. On page 45 it says: Keyword: [Voltage Range] Required: Yes, if [Pullup Reference], [Pulldown Reference], [POWER Clamp Reference], and [GND Clamp Reference] are not present Description: Defines the power supply voltage tolerance over which the model is intended to operate. It also specifies the default voltage rail to which the [Pullup] and [POWER Clamp] I-V data is referenced. This implies that the EDA tool supplies the Pullup Voltage in the range of typ min max. But of course this says than a Max (Fast) simulation cannot supply more than max, and a Min simulation cannot supply less than min, but this make no sense if there is fluctuations of the reference voltage. So we clearly cannot use [External Model] to do power simulations since the PuRef must be fixed. Arpad's statement in the Interconnect meeting that an External Model can either consume or generate the PuRef without an indication to the EDA tool of what it is going to do. The HSPICE B element has a switch to do it either way. External Model does not define such a switch. Walter Walter Katz wkatz@xxxxxxxxxx<mailto:wkatz@xxxxxxxxxx> Phone 303.449-2308 Mobile 303.335-6156