All,
Features of my Group/Set proposal in bullet form
* An interconnect "Model" "Interface" is either between Pin/Buffer,
Pin/Pad or Pad/Buffer.
* A Set contains a list of Models that have a logical association
(e.g.)
* All models in a bus (e.g.. DDR4, or PCIeG3)
* PDN Network
* All I/O models between Pad and Pin
* All I/O models between Buffer and Pad
* All uncoupled models
* All coupled models
* A Group has a list of Sets.
* Therefor a Group has a list of Models derived from the list of
Sets in the Group
* A [Component] can have one or more Groups.
* The User/EDA tool selects one Group for generating interconnect
models for a simulation.
* Group Types
* Component
* The interconnect is between buffer and pins.
* Buffers and Pads are shorted if there is a Pin/Pad Model but no
Pad/Buffer Model for an I/O or rail.
* Use a legacy Pin/Pad model If there is a Buffer/Pad model and no
Pad/Pin model for an I/O or rail.
* Bare-Die
* Models in the Group can only be Pad/Buffer. This implies that all
of the Models in all of the Sets in the Group are Buffer/Pad.
* Errors in Model Compatibility within a Group
* All Models in a Bare-Die Group can only be Pad/Buffer
* I/O pin_name rules
* Two Models cannot have the same Victim Pin Pin_name
* Two Models cannot have the same Victim Buffer Pin_name
* Rail rules
* The following rules apply to models that define rail connections
Pin/Buffer, Pin/Pad or Pad/Buffer. They do not apply to models when a rail
is only on one terminal to supply a reference voltage
* Two models cannot have the same pin rail connection.
* Two models cannot have the same buffer rail connection.
* Warnings in Model Compatibility within a Group
* I/O pin_name rules (include both Aggressor and Victim terminals.
* Two Models cannot have the same Pin Pin_name.
* Two Models cannot have the same Buffer Pin_name.
* No need to report warnings if already reported as errors.
Walter
Walter Katz
<mailto:wkatz@xxxxxxxxxx> wkatz@xxxxxxxxxx
978.461-0449 x 133
Mobile 303.335-6156
