Bob,
I would like to point out the third paragraph in the "DEFINITION OF THE
ISSUE:"
During a simulation that uses IBIS Models, the IBIS specification is not
clear what node should be used as the reference node for the voltage att
the buffer I/O. This is not an issue when the simulator supplies rail
voltages Pullup_ref, Pulldown_ref, Power_clamp_ref, Gnd_clamp_ref and
Ext_ref ("*_ref") to a model relative to the simulator reference node
(e.g. Node 0) that are same as the reference voltages ("[*Reference]")
supplied to the buffer when generating the IBIS Data (Device Under Test or
DUT).
As long as a simulator supplies the [* Reference] voltages to the *_ref
terminals relative to simulator Node 0, then simulator Node 0 is the
reference node for correct measurements of the I/O pad terminal of the
model.
This is what you referred to today as "these models exist and they work
today". And you are correct because they are only required to assume
either DUT conditions or ground referenced power integrity simulations.
Walter
From: Walter Katz [mailto:wkatz@xxxxxxxxxx] ;
Sent: Tuesday, June 28, 2016 4:04 PM
To: IBIS-ATM <ibis-macro@xxxxxxxxxxxxx>
Subject: Pin Reference 5
Walter Katz
<mailto:wkatz@xxxxxxxxxx> wkatz@xxxxxxxxxx
Phone 303.449-2308
Mobile 303.335-6156
