[ibis-macro] Re: What I learned at DesignCon about PDN simulations.

  • From: Bradley Brim <bradb@xxxxxxxxxxx>
  • To: Scott McMorrow <scott@xxxxxxxxxxxxx>, Gregory R Edlund <gedlund@xxxxxxxxxx>
  • Date: Thu, 6 Feb 2014 11:35:57 -0800

hello Scott, Greg and Walter,

Excellent points, Scott. My concern is also how to convert PDN noise to a 
jitter in a PDN macromodel as Walter promotes and Greg mentions? How do we know 
the accuracy of this conversion in the presence of the effects you cite?

When Greg says "the best way to do this" it may need to be qualified by the 
tradeoffs considered. Maybe "best" in the absence of investing to consider a 
more full system, such as Scott described with his 654 port signal/power model. 
Maybe it yielded a an approximate answer with a rapid simulation; but how was 
the difference determined vs. a more complete analysis.

Unless we can in general accurately convert crosstalk to only a jitter spec, 
then I am hesitant to accept without question we can do the same for PDN noise 
with high accuracy. PDN noise can be from many sources. For a SERDES channel it 
could be from general digital signals or it could be related to the IO buffers 
of the SERDES or it could be PDN-enhanced crosstalk (both local to TX or RX or 
even distributed throughout the system) among SERDES channels. As Scott 
discussed recently, PDN noise can also couple from rail-to-rail and affect the 
low (e.g. -50dB to -70dB) crosstalk requirements for higher data rate channels. 
Have done extractions recently where crosstalk above this level is dominated by 
PDN-enhanced coupling (non-local PDN 'noise', if you wish to call it that) 
relative to trace-to-trace crosstalk. This was below the high data rates Scott 
discussed. The PDN-enhanced crosstalk dominance was easily determined by 
turning off all direct trace-to-trace coupling during whole-board/package 
extraction.

The concept of a PDN macromodel to convert noise to jitter is an interesting 
concept. However, not certain it is fully proven nor considers effects such as 
Scott cited and PDN-enhanced crosstalk. Believe it requires more discussion in 
public forums before it is engaged in the IBIS ATM group. ATM group seems to 
have enough on its plate already. After proven elsewhere seems the time for ATM 
to discuss standardization of model data format and suggested algorithm(s).

If a PDN noise to jitter macromodel is proven applicable and (via IBIS ATM) we 
can agree on the data format to support a consensus algorithm suspect EDA 
companies will implement because the investment is likely not large. This 
doesn't seem to be a business issue (?due to only a few tool users applying?) 
and don't observe most/all such designs being 'farmed out'.

Best regards,
-Brad


P.S.  Greg, I'll take your bet concerning SSO ... unless you have a whole lot 
more than the common five fingers on one hand :)


From: Scott McMorrow [mailto:scott@xxxxxxxxxxxxx]
Sent: Thursday, February 06, 2014 8:31 AM
To: Gregory R Edlund
Cc: wkatz@xxxxxxxxxx; Bradley Brim; IBIS-ATM; ibis-macro-bounce@xxxxxxxxxxxxx
Subject: Re: [ibis-macro] Re: What I learned at DesignCon about PDN simulations.

Greg

Just thinking out loud, it's pretty hard to do any sort of meaningful SSO 
simulation without access to accurate die and package models.  Generally that's 
only available to the designers of the silicon.  So right there, you have a 
market limit.  Then we need to separate the linear and non-linear effects 
before noise can be modeled.

1) Is the noise merely superimposed on the signal?
2) Does it amplitude modulate the signal?
3) Does it phase or frequency modulate the signal through the PLL/DLL loop?

Seems to me that the model is quite different for these different consequences 
of power noise.

Scott


On Thu, Feb 6, 2014 at 9:57 AM, Gregory R Edlund 
<gedlund@xxxxxxxxxx<mailto:gedlund@xxxxxxxxxx>> wrote:

Walter, Brad, & IBIS Folks,

We've been talking about this internally off and on for some time.  There is 
definitely a need to account for supply noise in our AMI simulations.  Right 
now, the jitter parameters are the best way to do this.   (Correct me if I 
haven't been keeping up.)  This involves the model builder translating voltage 
noise into jitter in some simulation environment outside of IBIS.  I wonder how 
many companies actually attempt SSO analysis anymore?  I'd be willing to bet we 
could count them on one hand.  It seems everyone is farming their design work 
out.  That makes me question the business sense of implementing the necessary 
features in IBIS.  How could simulator companies recover their investment when 
the customer base is so small?

Greg Edlund


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