All, Files I will be discussing today. There are 3 .ibs files and 4 .ipkg files. The .ibs files reference .ipkg files. The .ipkg files are in parameter tree syntax. package.ibs [IBIS-ISS Package] by_model.ipkg This corresponds to MM's SerDes example where a 12 port model (either IBIS-ISS .mod file or an s12p Touchstone file) is associated with each model. [IBIS-ISS Package] by_pin.ipkg This corresponds to MM's SerDes example where a 12 port model (either IBIS-ISS .mod file or an s12p Touchstone file) is associated with each pin with a different length. By_model_mixed.ibs [IBIS-ISS Package] by_model_mixed.ipkg This corresponds to MM's DQ example where a 10 port model (s10p Touchstone file) is associated with each model. package_power.ibs [IBIS-ISS Package] package_power.ipkg This corresponds to what I think Xilinx wants to do. This is a package model of a full interface (e.g. "Bank"). The IBIS-ISS subckt has all (3) of the channels, and all of the power and ground pins in the "Bank". Note that there are only one Die power pad and only one Die ground pad. This is a simple solution that does have the constraint that there is only one Die port for each supply node. This constraint gets naturally removed when IBIS-EMD is implemented (IBIS 7.0), although could be implemented in IBIS 6.0 by the additions of a [Pad] section to described multiple Die Power and GND pads. I would like to defer discussion on the on-die modeling solution until I can prepare a proper presentation. Walter Walter Katz wkatz@xxxxxxxxxx Phone 303.449-2308 Mobile 303.335-6156