[ibis-macro] XML format sample
- From: "Mike LaBonte (milabont)" <milabont@xxxxxxxxx>
- To: <ibis-macro@xxxxxxxxxxxxx>
- Date: Mon, 3 Oct 2005 10:19:35 -0400
Here is one way we might use XML formatting for the documentation of
Verilog-A modules.
Mike
/*====================================================================
<module>
<mname>IBIS_R</mname>
<mdesc>
A simple resistor. The resistor value is calculated:
R = Rval * Scale
</mdesc>
<mterm>
<tname>p</tname>
<tdesc>Positive resistor terminal</tdesc>
</mterm>
<mterm>
<tname>n</tname>
<tdesc>Negative resistor terminal</tdesc>
</mterm>
<mparam>
<pname>Rval</pname>
<pdesc>Resistance value</pdesc>
</mparam>
<mparam>
<pname>Scale</pname>
<pdesc>Scaling factor for resistance value</pdesc>
</mparam>
<mexample>
VAMS: IBIS_R #(.Rval(100)) R1 (clk_n, clk_p);
</mexample>
<mexample>
SPICE: R1 clk_n clkp IBIS_R Rval=100
</mexample>
*/
//<msource>
module IBIS_R (p, n);
electrical p, n;
branch (p, n) Out;
parameter real Rval = 1.0;
parameter real Scale = 1.0;
analog begin
V(Out) <+ Scale * Rval * I(Out);
end
endmodule
//</msource>
/*
</module>
*/
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