[ibis-macro] Re: Analog Buffer Modeling - A Summary
- From: "Walter Katz" <wkatz@xxxxxxxxxx>
- To: <ambrishv@xxxxxxxxxxx>, "'IBIS-ATM'" <ibis-macro@xxxxxxxxxxxxx>
- Date: Wed, 18 Jan 2012 13:54:54 -0500 (EST)
Ambrish,
By definition, any ISS subckt is LTI, and therefore can be represented by
a Touchstone file, thus the answer to question 6 must be "No".
Unfortunately this question is a double negative: I aver that "Any Tx or
Rx analog LTI model can be represented by one of the proposed models (
AMI_Tstonefile_Tx, AMI_Tstonefile_Rx, AMI_Thevenin_Tx, or AMI_Thevenin_Rx
model."
I am on the PCIeG4 committee and IEEE 802.3bj committee. These standards
groups are defining 16Gbps, and 25Gbps channels that are being designed
now that are scheduled for first customer ship in 2014 and 2016. So I am
confident they will work 1, 2, and 4 years from now.
We are all working with customers that are planning for SerDes design for
the foreseeable future (out 4 years). Does anyone know of any new standard
that will not describe SerDes Buffer constraints in terms of either masks
off on-die S-Parameters, or parameters being passed into the
AMI_Thevenin_Tx, or AMI_Thevenin_Rx model .
Walter
From: ibis-macro-bounce@xxxxxxxxxxxxx
[mailto:ibis-macro-bounce@xxxxxxxxxxxxx] On Behalf Of Ambrish Varma
Sent: Wednesday, January 18, 2012 1:10 PM
To: IBIS-ATM
Subject: [ibis-macro] Re: Analog Buffer Modeling - A Summary
Walter,
I am very intrigued by questions 5 and 6. The answers to both the
questions can be a 'No' today but the real question back to you is
A) Can you say for sure that 1, 2, 5 years down the road, we will not need
new reserved models to describe the new analog LTI circuit of the times?
I suspect the answer to that question would be a 'No' as well. Hence the
next question:
B) Is it better to propose language that works today, and work 1, 2, 5
years from now as well, or is it better to take short cuts today, and
worry about the future when we come to it?
We are trying to write an Industry Standard that should encompass short
term and long term goals and not merely writing specifications to satisfy
existing norms.
It seems to me more and more that AMI_Thevenin_Tx, or AMI_Thevenin_Rx
should be examples in the Standard, rather than the Standard itself. As
for AMI_Tstonefile_Tx, AMI_Tstonefile_Rx, these keywords are AMI centric
and can very well be replaced by a general solution as proposed in other
BIRDs.
Thanks and Regards,
Ambrish.
Ambrish Varma | Member of Consulting Staff
P: 978.262.6431 <http://www.cadence.com> www.cadence.com
_____
From: ibis-macro-bounce@xxxxxxxxxxxxx
[mailto:ibis-macro-bounce@xxxxxxxxxxxxx] On Behalf Of Walter Katz
Sent: Wednesday, January 18, 2012 12:36 PM
To: IBIS-ATM
Subject: [ibis-macro] Analog Buffer Modeling - A Summary
All,
I will attend next Tuesday's meeting and will be prepared to discuss the
following. I will also be prepared to make a presentation to the IBIS
Summit on any of the following that you do not agree with:
1. LTI vs Non-LTI Modeling
a. I will propose that we table any IBIS-ATM discussion until
someone can present to IBIS a Channel that:
i. Channel
1. A real IC Vendor SerDes Tx and Rx buffer
2. A real Tx and Rx Package
3. A real interconnect
ii. When analyzing the Channel using
1. Non-LTI Vendor Models
2. An LTI approximation of the Models
iii. Give results that are different enough to cause the design
engineer to make substantively different design decisions.
2. Can anyone provide an IBIS SerDes Tx and Rx Buffer that has a
constant impedance over the operating range of the Buffer that cannot be
accurately represented by either the proposed AMI_Thevenin_Tx and
AMI_Thevenin_Rx model? Please note the following subtle limitation of BIRD
116 described in 3.
3. [External Model]/Language ISS assumes that the Analog Model LTI.
Therefore any Non-LTI affects that are caused by time variation that is
captured in the IBIS Rising and Falling Waveforms. The only way to handle
this is to change the D_to_A to contain a PWL.
4. Can anyone provide an ISS subckt that represents a Tx or Rx ISS
SerDes buffer model that cannot be converted to an accurate Touchstone
file?
5. Can anyone point to an industry standard SerDes specification
(e.g. PCIeG3, PCIeG4, IEEE 802.3 bj, ap, kr) that does not specify
constrains on the analog behavior that cannot be represented by the
proposed AMI_Thevenin_Tx and AMI_Thevenin_Rx model?
6. Does anyone disagree that any Tx or Rx analog LTI model can be
represented by one of the proposed models ( AMI_Tstonefile_Tx,
AMI_Tstonefile_Rx, AMI_Thevenin_Tx, or AMI_Thevenin_Rx model?
Walter
Walter Katz
wkatz@xxxxxxxxxx
Phone 303.449-2308
Mobile 720.333-1107
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