All,
Historical Ground (Node 0) vs Modern Interpretation of Reference and
Return Paths, to add to BIRD 189
The historical usage of "Ground" as implemented as Node 0 (aka GND in
IBIS-ISS, A_gnd in IBIS and this BIRD), and all voltage measurements are
made relative to this global simulator reference Node. As data rates have
increased, and power aware simulations need to account correctly for
return path currents and the requirement that the reference node for any
voltage measurement be close to the measurement point. Twenty years ago
1/10 of a UI wavelength was measured in feet, to day 1/10 of a UI is ~20
mils. Many existing tools generate package, connector and board level
interconnect models using Node 0 in w-line, t-line, s-parameter, capacitor
and resistor elements. These models are valid in models if the power rail
interconnect is adjusted for this:
* Circuit theory says that we can go from a partial element system
where ground and power loops are fully modeled to a ground referenced
system where node 0 ground is applied to every element in the path. But,
ground bounce inductance and resistance is then lumped into power circuit
and signal path circuits, and the discrimination between the these is
lost. From a differential node voltage perspective at the receiver, the
result is the same. The voltage between the signal and ground will remain
the same. If there is a difference, then somewhere in the circuit, the
ground partial inductance has not been reduced into the loop inductance
for the signal path and power paths.
* This is a pretty standard transformation from partial
inductance/resistance matrices to loop inductance/resistance matrices, and
is covered quite extensively in Brian Young's book, which is still the
best on the subject.
*
http://www.amazon.com/Digital-Signal-Integrity-Simulation-Interconnects/dp
/0130289043
BIRD 189 also supports package models "where ground and power loops are
fully modeled". This requires that all SPICE instance terminal in a
simulation are required to not be directly connected to Node 0 (uncles
there is no net current flowing to the instance terminals connected to
Node 0. Note that even if all of the package models fully support models
ground and power loops, the other models in the channel (e.g. board,
connector, SPICE buffer models, and package models on other components in
the channel) should fully support models ground and power loops. This is
only important for Power Aware simulation. For non-power aware
simulations, the EDA tool can supply DC voltage sources to all non "Power"
rails, and a 0.0 voltage source (relative to Nod 0) to all "Ground" rails.
Walter
Walter Katz
<mailto:wkatz@xxxxxxxxxx> wkatz@xxxxxxxxxx
978.461-0449 x 133
Mobile 303.335-6156
