[ibis-macro] Re: Macro Library in VHDL-AMS
- From: "Muranyi, Arpad" <arpad.muranyi@xxxxxxxxx>
- To: <ibis-macro@xxxxxxxxxxxxx>
- Date: Thu, 20 Oct 2005 16:41:39 -0700
Hello everyone,
This is the first release of our IBIS macro library in
VHDL-A(MS). This library is not complete yet, the ten
PWL sources and the eight IBIS buffer building blocks
are not included yet.
I was using Mentor's SystemVision tool to develop this
library. The neat thing about this tool is that an
educational version is available for free, and I believe
these test circuits are all within the limitations of
the education version (I didn't check this, though).
The attached file is actually a ZIP file, I just had
to give it a different extension to get it through our
mail protection system. Please rename it to .ZIP
when you save it. It contains the entire SystemVision
project directory. All test circuits, symbols, etc.
are included, so if you are interested in trying this
out, you can just open the project file:
"IBIS_Library.dproj"
and then open any of the schematics, press the simulate
button and see the results. Very convenient...
The macro model library file is in the subdirectory
called "hdl", and its name is: IBIS_macro_library.vhd"
in case you want to look at it with another tool, or
a text editor.
As usual, any comments are welcome, and enjoy!
As I am gearing up for the PWL and buffer models, I
wonder how I should go about them. I could make them
completely compatible with the Verilog-A version, but
since VHDL-AMS has a lot more capability regarding
reading files and tables, I wonder if I should make
it as convenient as possible for the user of the
library.
Is compatibility between the two versions of the
library a needed feature/goal, or is ease of use
a more important goal? For example, I could make
the buffer models read an IBIS file, find the
[Model] by its name in it, and read the data out
of the [Model], all without any extra user
intervention. (Just like the HSPICE B-element
does it).
Arpad
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