[ibis-macro] Re: NCSU IBIS research
- From: "Muranyi, Arpad" <arpad.muranyi@xxxxxxxxx>
- To: <ibis-macro@xxxxxxxxxxxxx>
- Date: Fri, 21 Oct 2005 08:41:20 -0700
He seems to be focusing on the accuracy of
differential buffers. Even though differential
buffer could be macro modeled, but I would
much prefer something along the lines of
writing either more templates, or beautify up
the library, or write AMS netlist parsers
substitution engines for the SPICE tools,
etc...
Arpad
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-----Original Message-----
From: ibis-macro-bounce@xxxxxxxxxxxxx [mailto:ibis-macro-bounce@xxxxxxxxxxxxx]
On Behalf Of Mike LaBonte (milabont)
Sent: Thursday, October 20, 2005 11:06 AM
To: ibis-macro@xxxxxxxxxxxxx
Cc: Bob Evans (rjevans)
Subject: [ibis-macro] NCSU IBIS research
Can we think of a way to tie some thesis work into what the ibis-macro
group is doing?
Mike
From: Paul Fernando [mailto:prfernan@xxxxxxxx]
Sent: Thursday, October 20, 2005 12:34 PM
To: Bob Evans (rjevans)
Subject: RE: News?
Hi Dr. Evans,
Hope you're doing fine. My work at ADI is going well and I'm looking
forward to getting back to NCSU and finishing up.
I'm planning on graudating next summer and I wanted your thoughts/advice
on my thesis.
As you know I'm doing my MS thesis under Dr. Franzon on IBIS. More
specifically, it's on studying the accuracy of IBIS models for
differential drivers.
I have a bunch of questions for which I'm hoping you could give some
pointers:
Do you know of any other modeling methodologies other than spice and
IBIS that I could use for comparisons? I've heard of Verilog-AMS but I'm
not sure what tool to use and how to develop these models.
What would be some good ways of evaluating IBIS model vs spice accuracy.
I've thought of the following so far:
1. Steady state output voltage comparison.
2. Transient delay comparison.
3. SSN analysis to compare supply currents.
4. Overshoot & undershoot comparisons.
I appreciate you thoughts on this matter.
Thanks,
Paul
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