Minutes from the 23 February ibis-atm meeting are attached.
The following document, which was discussed during the meeting, has been
posted to the work archive.
*DATE* AUTHOR <http://ibis.org/macromodel_wip/archive-author.html>
ORGANIZATION <http://ibis.org/macromodel_wip/archive-org.html> TITLE
<http://ibis.org/macromodel_wip/archive-title.html> FORMATS
23-FEB-2016 Walter Katz SiSoft De Embedding C_comp IBIS-ISS Subckts (zip
<http://ibis.org/macromodel_wip/archive/20160223/walterkatz/De_Embedding_C_comp_IBIS-ISS_Subckts.zip>
)(PDF
<http://ibis.org/macromodel_wip/archive/20160223/walterkatz/De%20Embedding%20C_comp%20IBIS-ISS%20Subckts/De-Embedding_C_comp_ISS.PDF>
)
The following document, which was discussed during the meeting, has been
posted to the work archive for the interconnect task group.
Title <http://ibis.org/interconnect_wip/index-bytitle.htm>FormatsAuthors
<http://ibis.org/interconnect_wip/index-byauthor.htm>Organization
<http://ibis.org/interconnect_wip/index-bycompany.htm>Date
<http://ibis.org/interconnect_wip/index-bydate.htm>
S-parameter interconnect model ports and terminals .pdf
<http://ibis.org/interconnect_wip/ReferencingSparameterModels.pdf> Arpad
Muranyi Mentor Graphics Feb 24 2016
IBIS Macromodel Task Group
Meeting date: 23 February 2016
Members (asterisk for those attending):
ANSYS: * Dan Dvorscak
* Curtis Clark
Broadcom (Avago): Xingdong Dai
* Bob Miller
Cadence Design Systems: * Ambrish Varma
Brad Brim
Kumar Keshavan
Ken Willis
Cisco: Seungyong (Brian) Baek
eASIC: * David Banas
Marc Kowalski
Ericsson: Anders Ekholm
GlobalFoundries: * Steve Parker
Intel: * Michael Mirmak
Keysight Technologies: * Fangyi Rao
* Radek Biernacki
Maxim Integrated Products: Hassan Rafat
Mentor Graphics: John Angulo
* Arpad Muranyi
Micron Technology: * Randy Wolff
Justin Butterfield
QLogic Corp.: James Zhou
Andy Joy
SiSoft: * Walter Katz
Todd Westerhoff
* Mike LaBonte
Synopsys: Rita Horner
Teraspeed Consulting Group: Scott McMorrow
Teraspeed Labs: * Bob Ross
TI: Alfred Chong
The meeting was led by Arpad Muranyi.
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Opens:
- None.
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Call for patent disclosure:
- None.
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Review of ARs:
- None.
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Review of Meeting Minutes:
- Arpad: Does anyone have any comments or corrections? [none]
- Radek: Motion to approve the minutes.
- Arpad: Second.
- Arpad: Anyone opposed? [none]
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New Discussion:
De-embedding C_comp IBIS-ISS Subcircuits:
- Walter: [sharing presentation]
- Overview:
- What is C_comp De-embedding?
- It refers to the tool's process of taking the v(t) tables and deriving
the K(t) scalers that describe the switching behavior of the pull up
and pull down devices.
- What if simple C_comp is replaced with a more complicated IBIS-ISS
subcircuit model? De-embedding becomes much more difficult.
- Proposed new approach for use with IBIS-ISS C_comp models:
- Model maker sweeps the value of a simple C_comp to generate K(t)
functions.
- These K(t) functions are used with the IBIS-ISS C_comp to see which ones
produce v(t) waveforms that best match the actual waveforms.
- Take the best K(t) waveforms (KT_fit) and generate v(t) waveforms using
a simple C_comp=0.0 (VT_fit).
- The finished IBIS Model has VT_Fit, C_comp=0.0, and the C_comp IBIS-ISS
subcircuit.
- The EDA tool takes the v(t) waveform (VT_Fit) and the C_comp (0.0) and
generates K(t) in the usual manner. This K(t) is then applied with the
C_comp IBIS-ISS subcircuit at simulation time.
- Discussion: Walter noted that he wasn't sure if we'd used the term
"de-embedding" in this context before. Arpad replied that we had used the
term "C_comp compensation" for this topic. Arpad summarized this proposed
method as a way for the model maker to find a v(t) curve that is not laden
with the C_comp subcircuit but is such that once the C_comp subcircuit is
applied the actual v(t) waveform is recovered. Walter considered this an
excellent summary of the idea. Radek noted that in fact we would very likely
only hope to come "close enough" to recovering the actual waveforms. Walter
agreed with this statement, but noted that C_comp's role in shaping the edge
of the initial waveform entering the channel was only one aspect of its
importance. The shape of the rising edge could be created with virtually any
C_comp, but the return loss when a wave were reflected back would be
dramatically wrong without a reasonable C_comp model. Bob agreed with the
basic idea of Walter's proposal. He suggested that perhaps the model maker,
given that they know the contents of the C_comp IBIS-ISS subcircuit, might be
able to define a driving waveform at the input of the C_comp subcircuit that
would yield the exact v(t) waveform at the output. This could then be folded
into the IBIS model, without having to go through the KT_Fit procedure. Bob
said he would have to think about potential details more carefully. David
asked if the idea was to get around having to modify the IBIS standard to
let the model maker specify the K(t) directly. Walter said that this would
have that effect, but that the primary goal was to find a way to avoid having
to burden the EDA tool with deriving the K(t) given a general C_comp model.
Arpad noted that there were more model makers than tool makers, and that it
might make sense to have the tools take care of this issue. Walter countered
that the EDA tools would have to perform this computation at the start of
every simulation, and that while it was "easy" with a regular C_comp, an
algorithmic approach or something else that was time consuming would be
necessary for a general C_comp model. He felt that it would be best to have
the model maker do it once and not to burden tools with this if we introduced
a general C_comp.
S-parameter port numbering:
- [With 25 minutes remaining and no existing topics ready for further
discussion, Arpad made a motion that we discuss some s-parameter port
numbering topics that had been under discussion in the interconnect task
group]
- Discussion: Arpad was interested in discussing the actual circuit topology
implied by the N ports, N+1 terminals (common reference) shortcut specified
in the current interconnect proposal. Arpad, Radek, Walter and David
discussed issues including when and/or if it is necessary or useful to go
to a 2*N terminal approach, preservation of common mode information, and when
vendor provided "signal pin only" sNp models with an implicit use of node zero
as the reference terminal were valid. The main discussions on this topic can
be found in the interconnect task group meetings.
For interconnect task group minutes on this topic:
//www.freelists.org/archive/ibis-interconn/02-2016,
refer to the posted minutes from the February 17th and 24th meetings.
- Arpad: Thank you all for joining.
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Next meeting: 01 March 2016 12:00pm PT
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IBIS Interconnect SPICE Wish List:
1) Simulator directives