Mike,
Let’s focus on a DDR memory part. There are DQ signals the reference VSSQ
and ADDRESS signals that reference VSS. The first thing the EDA tool is
required to know is VSS or VSSQ the reference signal for DQ1. IBIS files
(with [Pin Mapping]) tell us that. If we are making measurements at the pin
or pad, then we have no choice but to pick a reference node in our
simulation that is “closest” or “nearby” to the pin or pad. Sufficiently
nearby is well defined and depends on the rail voltage spectral density and
frequency of interest of our analysis. When IBIS was first created we were
in a 10Mbps world, no nearby was ~100ns ~100 inches. Today we are pushing
the limit of 50Gbps, so nearby becomes ~20ps ~.2 inches. We have ball
pitches of ~.05” and die size ~.5”, so we are OK.
Yes, IBIS models with no GND pins and in particular buffer only IBIS files
are by definition not power aware, so the question is somewhat academic
because in these case the EDA tool has no choice but to supply the rail
voltages from voltages sources at the buffer. So there is in fact a node
that can (and is) the reference voltage for that I/O pad of the buffer, and
that is the Pdref (or Gcref) terminal.
All of this is academic if we are not doing power aware simulations, and all
buffers are supplies by rail voltages sources defined by [Voltage Range] or
the [Pullup Reference], [Pulldown Reference], {GND Clamp Reference], or
[Power Clamp Reference].
IBIS does require models to be expressed as though hardware had been
measured when it wasn't.
The statement
Physical measurements require a hardware differential probe with the + probe
at a pin, die pad or buffer terminal and the – probe at a nearby reference
pin, die pad or buffer terminal.
Applies to simulations as well
Simulation measurements require a software differential probe with the +
probe at a pin, die pad or buffer terminal and the – probe at a nearby
reference pin, die pad or buffer terminal.
Note that there is a difference between a buffer only IBIS file, and a bare
die IBIS file. A buffer only IBIS file may be lacking POWER and GND pins, a
bare die IBIS file should include all of the bump (or wire bond) pads of the
die, including the POWER and GND bump (or wire bond) pads.
Walter
From: Mike LaBonte [mailto:mlabonte@xxxxxxxxxx]
Sent: Sunday, February 28, 2016 11:36 PM
To: wkatz@xxxxxxxxxx
Cc: IBIS-ATM <ibis-macro@xxxxxxxxxxxxx>
Subject: Re: [ibis-macro] Determining the reference signal_name of an I/O
buffer
I think we need to be clear at all times whether it is sufficient to
identify a reference signal_name or if an exact pin must be identified. The
first sentence of this goes both ways. One question is whether the
parasitics of the interconnect shorting the pins associated with one signal
together are small enough to warrant claiming that it wouldn't matter which
of those pins were used as a measurement reference node. I'm not so sure,
particularly if package parasitics are in play.
A potential conflict might come up with BIRD 161.1 Supporting Incomplete and
Buffer-only [Component] Descriptions <http://ibis.org/birds/bird161.1.docx>
. It has not yet passed, but it proposes allowing the first column of [Pin]
to give pad names instead of pin names. At least in that case we would know
pin parasitics were absent. But it allows says that a [Pin] section could
have just one pin.
IBIS has always supported producing models from hardware measurement, but it
is not certain that IBIS requires models to be expressed as though hardware
had been measured when it wasn't. A quick search tells me I have 169 IBIS
files on hand that do not contain the word "GND".
Mike
_____
From: "Walter Katz" <wkatz@xxxxxxxxxx <mailto:wkatz@xxxxxxxxxx> >
To: "IBIS-ATM" <ibis-macro@xxxxxxxxxxxxx <mailto:ibis-macro@xxxxxxxxxxxxx> >
Sent: Sunday, February 28, 2016 12:08:20 PM
Subject: [ibis-macro] Determining the reference signal_name of an I/O buffer
All,
Continuing this thought, since IBIS is a component measurement based system,
and since measurement are made at the pin of a component, and since every
measurement at an I/O pin is made between that pin and some nearby reference
pin, then all we need to do is define a method of determining the reference
signal_name for every I/O pin. The following algorithm should work for all
known existing IBIS models:
1. [Pin Mapping] tells the bus_label on each of the buffer rail
terminals.
2. These bus_labels define the signal_name on each of the rail
terminals.
3. If just one signal_name is on a Pin with Model_name GND, and the
values of the Pullup Reference, Power Clamp Reference, Ground Clamp
Reference, Pulldown Reference assigned that has that signal_name has a value
of 0.0V in the [Model], then a pin of that signal_name near the I/O pin is
the reference for the measurements at the I/O pin. Similarly, the I/O buffer
rail terminal with the reference signal_name at the I/O buffer is the
reference node for measurements at the I/O buffer. Similarly, the supply
pads at the die/package boundary near the I/O die pad are the reference for
measurements at the I/O die pad.
If this algorithm does not work for an I/O buffer (and I claim such a case
does not exist) then we can enhance IBIS by adding an option [I/O Reference]
section that has two columns. The first column is the Pin_name of an I/O
buffer, and the second column is the signal_name of the reference for all
measurements at the I/O buffer.
Walter
From: Walter Katz [mailto:wkatz@xxxxxxxxxx]
Sent: Saturday, February 27, 2016 8:58 PM
To: IBIS-ATM <ibis-macro@xxxxxxxxxxxxx <mailto:ibis-macro@xxxxxxxxxxxxx> >
Subject: One of the rail voltages of every IBIS buffer is a GND signal_name
and a reference node.
All,
I have looked at the data sheets for parts with RS232, ECL, PECL and MECL
buffers, and every one of them has one of the rail voltages connected to a
Ground (GND) data book name (signal_name).
Although the IBIS standard does allow the user to associate all of the rail
voltages with bus_labels on POWER pins, such a buffer is an unnatural act.
If we state that it is a given that every buffer has a Ground rail
connection, then we can state that every buffer has a well-defined reference
node for every other terminal measurement at the buffer.
I challenge anyone on this committee to find a part with an I/O buffer that
has no rail terminals that are Ground.
Walter
Walter Katz
<mailto:wkatz@xxxxxxxxxx> wkatz@xxxxxxxxxx
Phone 303.449-2308
Mobile 303.335-6156
