Minutes from the 28 Aug 2018 ATM Task Group meeting are attached.
Documents shown in the meeting are posted to the ATM work archive:
DATE
AUTHOR <http://ibis.org/macromodel_wip/archive-author.html>
ORGANIZATION <http://ibis.org/macromodel_wip/archive-org.html>
TITLE <http://ibis.org/macromodel_wip/archive-title.html>
FORMATS
28-AUG-2018
Justin Butterfield
Micron Technology
Micron IBIS-AMI Requirements for SE EQ
(zip
<http://ibis.org/macromodel_wip/archive/20180828/justinbutterfield/Micron_
IBIS-AMI_Requirements_for_SE_EQ.zip> )(pdf
<http://ibis.org/macromodel_wip/archive/20180828/justinbutterfield/Micron%
20IBIS-AMI%20Requirements%20for%20SE%20EQ/Micron%20IBIS-AMI%20Requirements
.pdf> )
28-AUG-2018
Bob Ross
Teraspeed Labs
IBIS ATM poll results
(zip
<http://ibis.org/macromodel_wip/archive/20180828/bobross/IBIS_ATM_poll_res
ults.zip> )(dir
<http://ibis.org/macromodel_wip/archive/20180828/bobross/IBIS%20ATM%20poll
%20results/> )
Mike
IBIS Macromodel Task Group
Meeting date: 2* August 2018
Members (asterisk for those attending):
ANSYS: Dan Dvorscak
Curtis Clark
Cadence Design Systems: * Ambrish Varma
Brad Brim
Kumar Keshavan
* Ken Willis
eASIC: David Banas
GlobalFoundries: Steve Parker
IBM Luis Armenta
Trevor Timpane
Intel: * Michael Mirmak
Keysight Technologies: * Fangyi Rao
* Radek Biernacki
* Ming Yan
Stephen Slater
Mentor, A Siemens Business: John Angulo
* Arpad Muranyi
Micron Technology: Randy Wolff
* Justin Butterfield
SiSoft: Walter Katz
* Mike LaBonte
SPISim: * Wei-hsing Huang
Synopsys: Rita Horner
Kevin Li
Teraspeed Consulting Group: Scott McMorrow
Teraspeed Labs: * Bob Ross
The meeting was led by Arpad Muranyi. Mike LaBonte took the minutes.
--------------------------------------------------------------------------------
Opens:
Arpad noted that Curtis Clark would be unable to attend, and Mike LaBonte would
take
the minutes. He also noted that next Monday would be Labor Day, asking if we
should
we meet the following day. We will meet.
-------------
Review of ARs:
- Arpad to send the straw poll email to the ATM.
This was done
- Randy Wolff to investigate if/why/how a clock waveform input might be used.
In progress.
- Michael M. to investigate if/why/how a clock waveform input might be used.
In progress.
--------------------------
Call for patent disclosure:
- None.
-------------------------
Review of Meeting Minutes:
Arpad asked for any comments or corrections to the minutes of the August 21
meeting. Bob Ross moved to approve the minutes. Mike LaBonte seconded the
motion.
There were no objections.
-------------
New Discussion:
Single-ended equalization topic:
Justin Butterfield showed "Micron IBIS-AMI Requirements for SE EQ".
- Slide 2: We must have DC offset, clock forwarding, component models, and Vref.
- Slide 3: The absence of [Diff Pin] is sufficient to denote single-ended
signaling.
Walter Katz had suggested other ideas such as a DC offset parameter.
- Slide 4: The clock_times array could supply the clock input to the Rx GetWave.
GetWave would use it, not modify it. An External_Timing_ref parameter would
control
this. Arpad Muranyi asked if in a component model, would another Rx buffer
generate
the clock ticks. Justin said that would be a possibility.
- Slide 5: Tools might already have their own bus definition capabilities.
IBIS could have a [Bus Definition] keyword.
- Slide 6: AMI models would see a differential signal, the voltage would be
adjusted
as a post-process. Ambrish Varma asked if the waveform would be shifted after
processing. Justin said it would. Ken Willis suggested that if the external
clock
parameter were absent, we would assume a CDR is present.
- Slide 3: Ambrish Varma asked if the DC offset would be equal to or related to
Vref.
Justin said they could be approximately the same, but we lose information
when we
differentiate the step response. Vref is for processing the Rx output. Ken
said the
external clock input is the most fundamental change being proposed, and we
should
keep the approach simple, at least at the beginning.
Straw-man poll on desired AMI improvements:
Bob Ross showed the straw-man poll results.
Bob said 5 companies responded. Column C is SiSoft, D is Micron. The rest were
anonymous.
Two additional items were added. Items with at least one response were
highlighted
in yellow. We might remove anything not highlighted. The stars show the "hit"
counts.
We could set a threshold at 3 stars.
Mike LaBonte asked if the numbers in column D were rank priorities. Bob said it
was
simply whatever was received. Arpad Muranyi asked if line 31 "Clocked Rx" was
the
same as "Clock Forwarding". Bob said it might be, noting that that item reached
the
3 star threshold.
Arpad Muranyi asked Which was most popular. Bob said item 1, Vref/DC offset,
was, with 4 stars.
Michael Mirmak suggested we could leave the unvoted items open for revision if
we get
more feedback. Bob said the final results would be presented next Tuesday.
Ambrish Varma asked if we had enough information to start writing BIRDs. Arpad
Muranyi
said it was surprising that clock forwarding didn't come up higher in the poll.
Ambrish said Cadence would start work on a BIRD.
Arpad Muranyi said his understanding of item 4 "Moving Vref" is a dynamically
changing
Vref, but he was not sure there was a need for that. Bob Ross suggested Vref
might be a
centered value found from existing simulations. Arpad noted that that item got
no stars.
Fangyi Rao said Vref is determined by the controller, and sent to the Rx. He
asked if
the controller output was needed. Ambrish Varma said the model might not use
Vref,
if it assumes the input is differential. Arpad noted that item 12 was also
about Vref.
Mike LaBonte asked if the slicer function should be handled by the Rx model,
not the EDA
tool, so that Vref would be relevant to the model. Arpad said the model can
handle Vref
already. Fangyi said that if the model were to determine Vref, the true
single-ended
wave would have to be passed into it. Ambrish asked why differential would not
work.
Fangyi said the IC vendor should answer that, noting that the operation of an
AGC for
example would impact Vref. It will be more realistic to handle Vref inside the
model.
Ken Willis asked why the AGC could not work deferentially. It should be
possible to
shift the output after processing. Fangyi said that AMI is tailored for
SerDes, which
assumes differential.
Arpad Muranyi asked if we had a volunteer to write a draft Vref BIRD, noting
that we
might need to begin by defining Vref. Fangyi Rao suggested that the definition
if
Vref might depend on the definition of waveform. Arpad said we could discuss
that
next week. Ambrish Varma suggested that we should hear from IC vendors on this
topic,
noting that as DDR speeds go go up they will look more like SerDes.
AR: Bob Ross to send poll spreadsheet to Mike LaBonte for posting.
AR: Arpad Muranyi to email list about definition of Vref.
- Mike L.: Motion to adjourn.
- Arpad: Second.
- Arpad: Thank you all for joining.
-------------
Next meeting: 28 August 2018 12:00pm PT
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IBIS Interconnect SPICE Wish List:
1) Simulator directives
