[ibis-macro] Re: Node ordering for IBIS buffer building blocks

  • From: "Muranyi, Arpad" <arpad.muranyi@xxxxxxxxx>
  • To: <ibis-macro@xxxxxxxxxxxxx>
  • Date: Mon, 3 Oct 2005 11:25:57 -0700

This certainly sounds like a discussion item for tomorrow...

I think we could all come up with some good logical reasons
for how to order the nodes, but at this point I am leaning
towards Barry's comment to do it as HSPICE (even though I don't
like their ordering).  However, this is really not a problem,
I can rearrange them any whichever way without too much work,
so I am not going to resist the majority rule...

Arpad
============================================================== 

-----Original Message-----
From: Mike LaBonte (milabont) [mailto:milabont@xxxxxxxxx] 
Sent: Monday, October 03, 2005 11:14 AM
To: Muranyi, Arpad; ibis-macro@xxxxxxxxxxxxx
Subject: RE: [ibis-macro] Node ordering for IBIS buffer building blocks

My preference with such matters has been to put required terminals
first, optional last. All buffers have power, and ground, and pad. Then
you might have pad_n, data_in, data_out, enable. Admittedly in this case
there is no neat succession of terminals, but I end up with the digital
terminals last. I suppose clamp power has to fit in there somewhere.
Maybe:

B       power ground c_power c_ground pad [pad_n] data_in data_out
enable
O       power ground c_power c_ground pad [pad_n] data_in enable
I       power ground c_power c_ground pad [pad_n] data_out

Mike

-----Original Message-----
From: ibis-macro-bounce@xxxxxxxxxxxxx
[mailto:ibis-macro-bounce@xxxxxxxxxxxxx] On Behalf Of Muranyi, Arpad
Sent: Monday, October 03, 2005 1:32 PM
To: ibis-macro@xxxxxxxxxxxxx
Subject: [ibis-macro] Node ordering for IBIS buffer building blocks

Hello,

I have a question about the order of the nodes for the IBIS buffer
building blocks in the library.  What should be our convention?

1)  Should we follow the order of nodes as it is done in the
    HSPICE B-elements?
2)  Should we have any other ordering scheme?  For example, have
    the "digital" (i.e. control) nodes first, such as In_D, En_D,
    Rcv_D, and then the analog ports?
3)  Any other suggestions?

Thanks,

Arpad
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