Bob,
Your whole discussion about ECL is a total obfuscation. Current flow is no
consideration on how to measure voltages at a buffer relative to a
reference node in the component. On slide 12 your statement " A VSS pin
(GND DUT connection) does not always exist" is totally incorrect. If there
is not such pin (GND DUT connection) how does the test fixture measure the
voltages at the I/O rail terminals? We MUST INSIST that all measurement be
made close to the buffer, at least inside of the component. This is a
basic requirement of any measurement of a buffer voltage.
Walter
-----Original Message-----
From: ibis-macro-bounce@xxxxxxxxxxxxx
[mailto:ibis-macro-bounce@xxxxxxxxxxxxx] On Behalf Of Bob Ross
Sent: Tuesday, July 12, 2016 12:33 PM
To: 'IBIS-ATM' <ibis-macro@xxxxxxxxxxxxx>
Subject: [ibis-macro] Pin Reference Concerns
All,
As a head's up, here is the presentation I plan to discuss at today's
meeting (July 12, 2016).
Bob
--
Bob Ross
Teraspeed Labs
http://www.teraspeedlabs.com
bob@xxxxxxxxxxxxxxxxx
Direct: 503-246-8048
Office: 971-279-5325
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