[ibis-macro] Re: Question on seeting the EMD direction
- From: "Walter Katz" <wkatz@xxxxxxxxxx>
- To: <Arpad_Muranyi@xxxxxxxxxx>, "IBIS-ATM" <ibis-macro@xxxxxxxxxxxxx>
- Date: Wed, 18 Jun 2008 16:07:02 -0400
All,
I think Arpad summarized the situation clearly.
Slide 2 contains the following elements that are already supported (one way
or another) in IBIS file, EBD files, package models, or ICM:
. R Resistor
. L Inductor
. C Capacitor
. G Conductance
. K Element
. T Tline
. W Line
- RLGC
- Table Driven
. S parameter element
What I think Arpad is requesting (certainly what I would like to confirm):
Is this list sufficient (including "Impulse Response" and "Poles and
Zeros"), and is this list LTI, and is this list complete.
I do believe that "DC Voltage" sources and a "Controlled Sources" are not
"LTI". I added Controlled Source to this proposed list because it was
mentioned at one of the presentations, I would like to see some
justification on why a "Controlled Source" is required to represent package,
connector, cable and PCB interconnect. A "DC Voltage" sources and reference
voltages (along with coupling) are subjects that we have yet to discuss in
detail. I added "DC Voltage" because of parallel terminations. I am not sure
that we need a "DC Voltage" source element in our interconnect spice subset
or if it is just another node in the interconnect subckt that needs to be
resolved by the EDA tool.
Walter
-----Original Message-----
From: ibis-macro-bounce@xxxxxxxxxxxxx
[mailto:ibis-macro-bounce@xxxxxxxxxxxxx]On Behalf Of Muranyi, Arpad
Sent: Wednesday, June 18, 2008 3:08 PM
To: IBIS-ATM
Subject: [ibis-macro] Question on seeting the EMD direction
Hello everyone,
In our IBIS-ATM meeting yesterday, we had a discussion on the
types of SPICE (or SPICE-like) circuit elements we would like
to see included in the future IBIS interconnect modeling "language".
The conversation was prompted by Walter's presentation slides,
which can be found on our web site:
http://www.vhdl.org/pub/ibis/macromodel_wip/archive/20080617/walterkatz/
EMD%20Differential%20Transmission%20Line%20Model/SiSoft_EMD_Models_08061
7.pdf
To sum up the discussion in a few words, Walter proposed a
"standard SPICE" language which could be converted to anyone's
SPICE variant easily. (The elements we discussed are listed
on slide #2 in the above presentation). To make this possible
and keep the language simple, Walter proposed that this "standard
SPICE" should have the assumption that every element is LTI
(linear and time invariant) which supposed to be sufficient
for all interconnect models, such as packages, connectors,
cables, and PCB traces.
I would like to solicit comments and feedback on this from
everyone, especially our interconnect experts, because I want
to avoid history to repeat itself. (We spent years to develop
*-AMS, ICM, Macro Modeling Library yet they are barely used
for various reasons).
Please send us your comments on this topic so we could develop
something that is be useful and welcomed by the SI/PI engineering
community.
Thanks,
Arpad
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